ATMega644P and 25AA010A SPI Bus Serial EEPROM

 Overview

The Microchip Technology Inc. 25XX010A is a 1-Kbit (8-bit x 127) Serial Electrically Erasable PROM (EEPROM). The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. 

Since it uses the SPI interface it can handle the clock rate up to 10MHz faster than other I2C(TWI) serial EEPROM. Its read/write cycles is up to 1M times.

 

It has various device's package including a DIP-8 package for hobbyists prototyping.

Device Selection Table

This chip also has a model in Proteus that enable the engineer to test its operation by software.

 

Package Types and Pin Function Table

The SPI transfer and receive must have the following data bytes, instruction, address, and data.

Block Diagram, Instructions, and SPI Read Sequence

 

The read command is 0x03 follows by the EEPROM address. The EEPROM 8-bit data will shift out by the SPI read routine issued by the microprocessor. 

Writing data to the EEPROM requires around 5ms. It requires a write enable instruction before the data writing sequence able to process.

Write Enable and Disable Commands

 

Write-enable command is 0x06 while the Write-disable command is 0x04. Additionally the Write Protect (WP) pin must pull high to enable data writing.

Byte write sequence instruction is 0x02 follows by the EEPROM address and the 8-bit data. It also has a page write sequence to write a burst of 16 bytes data package. The microprocessor needs to wait around 5ms to complete data writing.
 

Byte and Page Write Sequences

 

The Read Status Register Instruction is optional you can read the device datasheet for more detail. 

 It's useful the for a master MCU to determine when the next read or write operation will proceed. Some programmer just use a delay function that last around 100 micro-seconds instead of using this operation.

ATMega644 and  25AA010A Interfacing

Using a dedicated SPI interface of an MCU is very fast and reliable. The internal MCU serial communication module process this serial data transmission and reception tasks.

This example show a write and read operation to the 25AA010A from a master ATMega644P SPI. Data is written to the 25AA010A prior to reading back from this chip. Then they are shown on PORTC.

Schematic

 Source Code "main.c":

1. /*
2. * 12-spi_25AA010A.c
3. *
4. * Created: 2/24/2026 2:16:04 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. void SPI_MasterInit(void)
21. {
22. /* Set MOSI and SCK output, all others input */
23. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
24. /* Enable SPI, Master, set clock rate fck/16 */
25. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
26. }
27. 
    
28. void SPI_MasterTransmit(char cData)
29. {
30. /* Start transmission */
31. SPDR = cData;
32. /* Wait for transmission complete */
33. while(!(SPSR & (1<<SPIF)))
34. ;
35. }
36. 
    
37. void SPI_SlaveInit(void)
38. {
39. /* Set MISO output, all others input */
40. DDR_SPI = (1<<DD_MISO);
41. /* Enable SPI */
42. SPCR = (1<<SPE);
43. }
44. char SPI_SlaveReceive(void)
45. {
46. /* Wait for reception complete */
47. while(!(SPSR & (1<<SPIF)))
48. ;
49. /* Return Data Register */
50. return SPDR;
51. }
52. 
    
53. // 93AA46B SPI EEPROM
54. 
    
55. void write_enable(void){
56. PRT_SPI&=~(1<<DD_SS);
57. SPI_MasterTransmit(0x06);
58. PRT_SPI|=(1<<DD_SS);
59. }
60. 
    
61. unsigned char read_status(void){
62. PRT_SPI&=~(1<<DD_SS);
63. SPI_MasterTransmit(0x05);
64. SPI_MasterTransmit(0x00);
65. unsigned char temp=SPI_SlaveReceive();
66. PRT_SPI|=(1<<DD_SS);
67. return temp;
68. }
69. void write_93AA46B(unsigned char address, unsigned char data){
70. unsigned char temp;
71. PRT_SPI&=~(1<<DD_SS);
72. SPI_MasterTransmit(0x02);
73. SPI_MasterTransmit(address);
74. SPI_MasterTransmit(data);
75. PRT_SPI|=(1<<DD_SS);
76. //Check Write Busy Flag
77. do
78. {
79. temp=read_status();
80. } while ((temp&0x01)==1);
81. }
82. 
    
83. unsigned char read_93AA46B(unsigned char address){
85. PRT_SPI&=~(1<<DD_SS);
86. SPI_MasterTransmit(0x03);
87. SPI_MasterTransmit(address);
88. SPI_MasterTransmit(0xFF);
89. unsigned char data=SPI_SlaveReceive();
90. PRT_SPI|=(1<<DD_SS);
91. return data;
92. }
93. int main(void)
94. {
95. /* Replace with your application code */
96. SPI_MasterInit();
97. PRT_SPI|=(1<<DD_SS);
98. unsigned char temp=0, data=0;
99. DDRC=0xFF;
100. write_enable();
101. while (1)
102. {
103. for (unsigned char i=0;i<8;i++)
104. {
105. write_93AA46B(i,1<<i);
106. PORTC=read_93AA46B(i);
107. _delay_ms(1000);
108. }
109. }
110. }
111. 
     
112. 
     
113. 
     
114. 
     
115. 
     

I don't have a physical device for this chip. So I just tested it in a simulator.

Now I added a character LCD to display some ASCII data. 

Schematic

 

Source Code "main.c":

1. /*
2. * 25AA010A_1602.c
3. *
4. * Created: 2/24/2026 9:36:19 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. void SPI_MasterInit(void)
21. {
22. /* Set MOSI and SCK output, all others input */
23. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
24. /* Enable SPI, Master, set clock rate fck/16 */
25. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
26. }
27. 
    
28. void SPI_MasterTransmit(char cData)
29. {
30. /* Start transmission */
31. SPDR = cData;
32. /* Wait for transmission complete */
33. while(!(SPSR & (1<<SPIF)))
34. ;
35. }
36. 
    
37. void SPI_SlaveInit(void)
38. {
39. /* Set MISO output, all others input */
40. DDR_SPI = (1<<DD_MISO);
41. /* Enable SPI */
42. SPCR = (1<<SPE);
43. }
44. char SPI_SlaveReceive(void)
45. {
46. /* Wait for reception complete */
47. while(!(SPSR & (1<<SPIF)))
48. ;
49. /* Return Data Register */
50. return SPDR;
51. }
52. 
    
53. // 93AA46B SPI EEPROM
54. 
    
55. void write_enable(void){
56. PRT_SPI&=~(1<<DD_SS);
57. SPI_MasterTransmit(0x06);
58. PRT_SPI|=(1<<DD_SS);
59. }
60. 
    
61. unsigned char read_status(void){
62. PRT_SPI&=~(1<<DD_SS);
63. SPI_MasterTransmit(0x05);
64. SPI_MasterTransmit(0x00);
65. unsigned char temp=SPI_SlaveReceive();
66. PRT_SPI|=(1<<DD_SS);
67. return temp;
68. }
69. void write_25AA010A(unsigned char address, unsigned char data){
70. write_enable();
71. unsigned char temp;
72. PRT_SPI&=~(1<<DD_SS);
73. SPI_MasterTransmit(0x02);
74. SPI_MasterTransmit(address&0x7F);
75. SPI_MasterTransmit(data);
76. PRT_SPI|=(1<<DD_SS);
77. //Check Write Busy Flag
78. do
79. {
80. temp=read_status();
81. } while ((temp&0x01)==1);
82. }
83. 
    
84. unsigned char read_25AA010A(unsigned char address){
85. PRT_SPI&=~(1<<DD_SS);
86. SPI_MasterTransmit(0x03);
87. SPI_MasterTransmit(address&0x7F);
88. SPI_MasterTransmit(0x00);
89. _delay_us(100);
90. unsigned char data=SPI_SlaveReceive();
91. PRT_SPI|=(1<<DD_SS);
92. return data;
93. }
94. 
    
95. int main(void)
96. {
97. /* Replace with your application code */
98. SPI_MasterInit();
99. PRT_SPI|=(1<<DD_SS);
100. lcd_init();
102. unsigned char temp[16]="ATMEGA644P SPI";
103. for (unsigned char i=0;i<16;i++)
104. {
105. write_25AA010A(i,temp[i]);
106. }
107. for (unsigned char i=0;i<16;i++)
108. {
109. temp[i]=read_25AA010A(i);
110. }
111. lcd_text(temp);
113. unsigned char temp_1[16]="25AA010A EEPROM";
114. for (unsigned char i=16;i<32;i++)
115. {
116. write_25AA010A(i,temp_1[i]);
117. }
118. for (unsigned char i=16;i<32;i++)
119. {
120. temp_1[15-i]=read_25AA010A(i);
121. }
122. lcd_xy(1,2);
123. lcd_text(temp_1);
125. while (1)
126. {
128. }
129. }

Click here to download this example.

 

 

 

ATMega644P SPI and MCP492X 12-bit ADC

Overview

The Microchip Technology Inc. MCP492X are 2.7 – 5.5V, low-power, low DNL, 12-Bit Digital-to-Analog Converters (DACs) with optional 2x buffered output and SPI interface. 
The MCP492X are DACs that provide high accuracy and low noise performance for industrial applications where calibration or compensation of signals (such as temperature, pressure and humidity) are required. The MCP492X are available in the extended temperature range and PDIP, SOIC, MSOP and TSSOP packages.

MCP4921 and MCP4922 DIP Chip

 This chip has a DIP version that is very user-friendly for DIY electronics prototyping. The MCP4921 has only one output DAC while the MCP4922 has two output DAC. DAC selection is set in software.

 

These two versions of chip function almost the same except the number of output DAC.

PIN FUNCTION TABLE

 This 12-bit DAC yield different 4096 step. Using a typical +5.0VDC supply voltage we can double its output voltage level to 2X via its gain control bit.

Output Voltage Calculation

The SPI interface of this chip is one direction (write only). One SPI data frame is 16-bit (two byte) that contain DAC setting and 12-bit DAC value.

WRITE COMMAND REGISTER

The Chip Select (CS) is active low. So the master MCU keeps this pin low for two bytes of data transmission.

Write Command

 Using a dedicates SPI interface of an MCU offers a high speed data transmission.

ATMega644P SPI and MCP4921 Single DAC

The MCP4921 is a simple 8-bit DAC chip with single output.  Here the ATMega644P send any DAC voltage to this chip with the lowest and the highest voltage level.

Schematic

 I use its 2X gain feature that give a maximum output voltage up to 10VDC from a 5.0VDC supply voltage.

1. /*
2. * 12-spi_mcp4921.c
3. *
4. * Created: 2/23/2026 2:55:53 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. #define BUF 14
21. #define G1X 13
22. #define ACTIVE 12
23. 
    
24. void SPI_MasterInit(void)
25. {
26. /* Set MOSI and SCK output, all others input */
27. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
28. /* Enable SPI, Master, set clock rate fck/16 */
29. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
30. }
31. 
    
32. void SPI_MasterTransmit(char cData)
33. {
34. /* Start transmission */
35. SPDR = cData;
36. /* Wait for transmission complete */
37. while(!(SPSR & (1<<SPIF)))
38. ;
39. }
40. 
    
41. void SPI_SlaveInit(void)
42. {
43. /* Set MISO output, all others input */
44. DDR_SPI = (1<<DD_MISO);
45. /* Enable SPI */
46. SPCR = (1<<SPE);
47. }
48. char SPI_SlaveReceive(void)
49. {
50. /* Wait for reception complete */
51. while(!(SPSR & (1<<SPIF)))
52. ;
53. /* Return Data Register */
54. return SPDR;
55. }
56. 
    
57. void mcp4921_send(unsigned int value){
58. unsigned int mcp4922_data,dac_12;
59. mcp4922_data=(1<<BUF)|(1<<ACTIVE);
60. dac_12=value;
61. mcp4922_data|=dac_12&0x0FFF;
62. PRT_SPI&=~(1<<DD_SS);
63. SPI_MasterTransmit(mcp4922_data>>8);
64. SPI_MasterTransmit(mcp4922_data&0x00FF);
65. PRT_SPI|=(1<<DD_SS);
66. }
67. 
    
68. int main(void)
69. {
70. /* Replace with your application code */
71. SPI_MasterInit();
72. while (1)
73. {
74. mcp4921_send(0x0000);
75. _delay_ms(1000);
76. mcp4921_send(0x0FFF);
77. _delay_ms(1000);
78. }
79. }
80. 
    
81. 
    
82. 
    

The 12-bit DAC data is masked with the MCP4921 control bits.

Now let create a sine wave output using a DAC data table. This output sine wave doesn't have zero cross.

Sine Wave Generating

 

Output DAC Signal

Its frequency is around 120Hz.

1. /*
2. * sine_wave.c
3. *
4. * Created: 2/23/2026 7:41:55 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. #define BUF 14
21. #define G1X 13
22. #define ACTIVE 12
23. 
    
24. static unsigned int sine_table[50] =
25. {
26. 512, 576, 639, 700, 759, 813, 862, 907, 944, 975,
27. 999, 1015, 1023, 1023, 1015, 999, 975, 944, 907, 862,
28. 813, 759, 700, 639, 576, 512, 448, 385, 324, 265,
29. 211, 162, 117, 80, 49, 25, 9, 1, 1, 9,
30. 25, 49, 80, 117, 162, 211, 265, 324, 385, 448
31. };
32. 
    
33. void SPI_MasterInit(void)
34. {
35. /* Set MOSI and SCK output, all others input */
36. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
37. /* Enable SPI, Master, set clock rate fck/16 */
38. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
39. }
40. 
    
41. void SPI_MasterTransmit(char cData)
42. {
43. /* Start transmission */
44. SPDR = cData;
45. /* Wait for transmission complete */
46. while(!(SPSR & (1<<SPIF)))
47. ;
48. }
49. 
    
50. void SPI_SlaveInit(void)
51. {
52. /* Set MISO output, all others input */
53. DDR_SPI = (1<<DD_MISO);
54. /* Enable SPI */
55. SPCR = (1<<SPE);
56. }
57. char SPI_SlaveReceive(void)
58. {
59. /* Wait for reception complete */
60. while(!(SPSR & (1<<SPIF)))
61. ;
62. /* Return Data Register */
63. return SPDR;
64. }
65. 
    
66. void mcp4921_send(unsigned int value){
67. unsigned int mcp4922_data,dac_12;
68. mcp4922_data=(1<<BUF)|(1<<ACTIVE);
69. dac_12=value;
70. mcp4922_data|=dac_12&0x0FFF;
71. PRT_SPI&=~(1<<DD_SS);
72. SPI_MasterTransmit(mcp4922_data>>8);
73. SPI_MasterTransmit(mcp4922_data&0x00FF);
74. PRT_SPI|=(1<<DD_SS);
75. }
76. 
    
77. int main(void)
78. {
79. /* Replace with your application code */
80. SPI_MasterInit();
81. char i=0;
82. while (1)
83. {
84. mcp4921_send(4*sine_table[i]);
85. //_delay_ms(10);
86. i++;
87. if(i>49) i=0;
88. }
89. }
90. 
    
91. 
    
92. 
    
93. 
    

ATMega644P SPI and MCP4921 Single DAC

The MCP4922 has two output DAC but doubled in footprint. However these two chips are identical in functions. This example show how to write DAC values to this chip.

Schematic

 The master MCU just send the DAC values once and it keep in the buffer of the MCP4922 (buffer enabled).

1. /*
2. * 12-spi_mcp4922.c
3. *
4. * Created: 2/22/2026 8:01:15 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. #define DAC_B 15
21. #define BUF 14
22. #define G1X 13
23. #define ACTIVE 12
24. 
    
25. void SPI_MasterInit(void)
26. {
27. /* Set MOSI and SCK output, all others input */
28. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
29. /* Enable SPI, Master, set clock rate fck/16 */
30. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
31. }
32. 
    
33. void SPI_MasterTransmit(char cData)
34. {
35. /* Start transmission */
36. SPDR = cData;
37. /* Wait for transmission complete */
38. while(!(SPSR & (1<<SPIF)))
39. ;
40. }
41. 
    
42. void SPI_SlaveInit(void)
43. {
44. /* Set MISO output, all others input */
45. DDR_SPI = (1<<DD_MISO);
46. /* Enable SPI */
47. SPCR = (1<<SPE);
48. }
49. char SPI_SlaveReceive(void)
50. {
51. /* Wait for reception complete */
52. while(!(SPSR & (1<<SPIF)))
53. ;
54. /* Return Data Register */
55. return SPDR;
56. }
57. 
    
58. int main(void)
59. {
60. /* Replace with your application code */
61. SPI_MasterInit();
62. unsigned int mcp4922_data,dac_12;
63. mcp4922_data=(1<<DAC_B)|(1<<BUF)|(1<<ACTIVE);
64. dac_12=3000;
65. mcp4922_data|=dac_12&0x0FFF;
66. PRT_SPI&=~(1<<DD_SS);
67. SPI_MasterTransmit(mcp4922_data>>8);
68. SPI_MasterTransmit(mcp4922_data&0x00FF);
69. PRT_SPI|=(1<<DD_SS);
71. mcp4922_data=(1<<BUF)|(1<<ACTIVE);
72. dac_12=2048;
73. mcp4922_data|=dac_12&0x0FFF;
74. PRT_SPI&=~(1<<DD_SS);
75. SPI_MasterTransmit(mcp4922_data>>8);
76. SPI_MasterTransmit(mcp4922_data&0x00FF);
77. PRT_SPI|=(1<<DD_SS);
78. while (1)
79. {
80. }
81. }
82. 
    

Now I added one ADC input to adjust the output DAC values.

Schematic

 

1. /*
2. * adc_dac.c
3. *
4. * Created: 2/23/2026 9:54:28 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. #define DAC_B 15
21. #define BUF 14
22. #define G1X 13
23. #define ACTIVE 12
24. 
    
25. void SPI_MasterInit(void)
26. {
27. /* Set MOSI and SCK output, all others input */
28. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
29. /* Enable SPI, Master, set clock rate fck/16 */
30. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
31. }
32. 
    
33. void SPI_MasterTransmit(char cData)
34. {
35. /* Start transmission */
36. SPDR = cData;
37. /* Wait for transmission complete */
38. while(!(SPSR & (1<<SPIF)))
39. ;
40. }
41. 
    
42. void SPI_SlaveInit(void)
43. {
44. /* Set MISO output, all others input */
45. DDR_SPI = (1<<DD_MISO);
46. /* Enable SPI */
47. SPCR = (1<<SPE);
48. }
49. char SPI_SlaveReceive(void)
50. {
51. /* Wait for reception complete */
52. while(!(SPSR & (1<<SPIF)))
53. ;
54. /* Return Data Register */
55. return SPDR;
56. }
57. 
    
58. void dac_write(char dac, char gain, unsigned int dac_value){
59. unsigned int mcp4922_data,dac_12,temp;
60. if(gain==2) temp=0;
61. else temp=1;
62. if((dac=='B')||(dac==2)||(dac=='b')||(dac=='2'))
63. mcp4922_data=(1<<DAC_B)|(1<<BUF)|(temp<<G1X)|(1<<ACTIVE);
64. else if(dac=='A'||(dac==1)|(dac=='a')||(dac=='1'))
65. mcp4922_data=(1<<BUF)|(temp<<G1X)|(1<<ACTIVE);
66. else
67. mcp4922_data=(1<<BUF)|(temp<<G1X)|(1<<ACTIVE);
68. mcp4922_data|=dac_value&0x0FFF;
69. PRT_SPI&=~(1<<DD_SS);
70. SPI_MasterTransmit(mcp4922_data>>8);
71. SPI_MasterTransmit(mcp4922_data&0x00FF);
72. PRT_SPI|=(1<<DD_SS);
73. }
74. 
    
75. int main(void)
76. {
77. /* Replace with your application code */
78. SPI_MasterInit();
79. DDRB=0xFF;
80. //PA0 or ADC0 as an analog input
81. DDRA=0;
82. //Turn on the ADC module
83. ADCSRA=(1<<ADEN);
84. uint16_t temp;
85. ADMUX=0;
86. dac_write(1, 2, 0x0FF);
87. dac_write(2, 1, 0x0FFF);
88. _delay_ms(5000);
89. while (1)
90. {
91. //Start the conversion
92. ADCSRA|=(1<<ADSC);
93. //Wait for the completion
94. while((ADCSRA&(1<<ADSC))==1);
95. //Read the result
96. temp=ADCL+(ADCH<<8);
97. dac_write('A',2,temp*4);
98. dac_write('B',2,0x0FFF-(temp*4));
99. _delay_ms(100);
100. }
101. }
102. 
     
103. 
     
104.