Internal Oscillator of PIC18F1220

 

Introduction

Clock source of PIC18F1220 is driven from external source or internal source. Using external crystal, clocking frequency is broad but it needs additional clocking circuitry and components.

Oscillator type

External Crystal Oscillator

External clock source are Low Power (LP), Crystal/Resonator (XT), and High Speed (HS) crystal oscillator. Its frequency ranges from 32kHz to 20MHz.

Crystal oscillator and its capacitors value used

Internal RC Oscillator

Internal oscillator is an inside RC oscillator that can be set in program. Its frequency ranges from 31kHz to 8MHz. To use this feature, programmer need to work with PIC18F1220 configuration bits, Oscillator Control Register, and Oscillator Tuning Register.

Clock diagram of PIC18F1220

Using internal oscillator save components requirement, and on-board design space.

Setting Up in Program

Setting configuration bits of PIC18F1220 is a priority for internal oscillator.

Configuration Bits

There are up to 13 configuration registers in PIC18F1220. However CONFIGH1H (address 300001h) contains setting for internal oscillator.

CONFIG1H Configuration Register

However in XC8 programmer use “#pragma config” directive. Programmer can select only internal oscillator only, or with I/O function on RA6 and RA7.

Registers Setting

There are two registers in SFR relate to internal oscillator.

Oscillator Tuning Registers – OSCTUNE

This register make a frequency tuning of internal oscillator between its lowest frequency and its highest frequency.

Oscillator Tuning Registers – OSCTUNE

Oscillator Control Register – OSCCON

This register set system clock mode, switch between discrete frequency of internal oscillator, and status checking.

Oscillator Control Register – OSCCON

Programming Example

We want to test selected 4MHz internal oscillator. LED connects to RA7 blinks at a specific rate. A push button connects to RA0 toggles an output LED on RA6 whenever it’s pressed.

Schematic Diagram

Since internal oscillator is used, there is no requirement to add external crystal oscillator.

Schematic Diagram

C Programming

Port A is multiplexed with analog input function. User needs to disable this feature to make this port as a solely digital I/O.

C

/*

 * PIC18F1220 internal RC oscillator

 * and its I/O

 */

#include <xc.h>

#include "config.h"

​

#define _XTAL_FREQ  4000000

​

void main(void){

    /*Select 4MHz internal oscillator*/

    OSCCONbits.IRCF=0x06;

    /*Clear IO*/

    PORTA=0x00;

    LATA=0x00;

    /*Disable analog input function*/

    ADCON1=0x7F;

    /*RA0 digital input*/

    TRISA=0x01;

    while(1){

        RA7^=1;

        LATA6=RA0;

        __delay_ms(250);

    }

}

Configuration bits contain setting for this controller especially internal oscillator setting. We choose internal oscillator with I/O function on both RA6 and RA7.

C

// PIC18F1220 Configuration Bit Settings

​

// CONFIG1H

#pragma config OSC = INTIO2     // Oscillator Selection bits (Internal RC oscillator, port function on RA6 and port function on RA7)

#pragma config FSCM = ON        // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)

#pragma config IESO = ON        // Internal External Switchover bit (Internal External Switchover mode enabled)

​

// CONFIG2L

#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)

#pragma config BOR = ON         // Brown-out Reset Enable bit (Brown-out Reset enabled)

// BORV = No Setting

​

// CONFIG2H

#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))

#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

​

// CONFIG3H

#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled, RA5 input pin disabled)

​

// CONFIG4L

#pragma config STVR = ON        // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)

#pragma config LVP = ON         // Low-Voltage ICSP Enable bit (Low-Voltage ICSP enabled)

​

// CONFIG5L

#pragma config CP0 = OFF        // Code Protection bit (Block 0 (00200-0007FFh) not code-protected)

#pragma config CP1 = OFF        // Code Protection bit (Block 1 (000800-000FFFh) not code-protected)

​

// CONFIG5H

#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code-protected)

#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

​

// CONFIG6L

#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (00200-0007FFh) not write-protected)

#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (000800-000FFFh) not write-protected)

​

// CONFIG6H

#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)

#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write-protected)

#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

​

// CONFIG7L

#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (00200-0007FFh) not protected from table reads executed in other blocks)

#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (000800-000FFFh) not protected from table reads executed in other blocks)

​

// CONFIG7H

#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from table reads executed in other blocks)

​

Click here to download this programming example package.

Using Digital I/O of PIC18F1220

 

Introduction

PIC18F1220 has two 8-bit digital I/O ports – Port A and Port B. They are bi-directional readable and writable. Their data directions are controlled by their TRIS registers.

Port A

Port A data direction is controlled by TRISA. Setting this registers allowing this port to accept input data, otherwise outputting digital data.

PORTA is considered as an input buffer. LATA is an output buffer. These two registers must be cleared before configuring its data direction.

Pin diagram of PIC18F1220

Port B

Port B data direction is controlled by TRISB. Setting this register allowing this port to accept input data, otherwise outputting digital data.

PORTB is considered as an input buffer. LATB is an output buffer. These two registers must be cleared before configuring its data direction.

Port B Programming Example

Since Port A and Port B are multiplexed with analog input function. I decided to select some pin of Port B that are solely digital I/O pin.

Schematic Diagram

RB6 of Port B is selected as a digital input pin connecting to a push button. RB7 connects to an output LED. Whenever push button is pressed the controller toggle output LED.

Schematic Diagram

External crystal oscillator has a frequency of 4MHz.

MPLABX XC8 Programming

This introductory tutorial is written in XC8 in MPLABX IDE. Overall program made of a dozen of lines.

C

/*

 * PIC18F1220 digital I/O Reading

 */

#include <xc.h>

#include "config.h"

​

#define SW1     RB6

#define LED1    RB7

​

void main(void){

    /*Clear I/O*/

    LATB=0x00;

    PORTB=0x00;

    /*RB6 digital input*/

    TRISB=0x40;

    while(1){

        /*Check input status*/

        if(RB6==1){

            /*Wait until SW1 released*/

            while(RB6==1);

            /*Toggle LED1*/

            LATB^=0x80;

        }

    }

}

Configuration bit of PIC18F1220 putted separately in “config.h” file.

C

// PIC18F1220 Configuration Bit Settings

​

// CONFIG1H

#pragma config OSC = XT         // Oscillator Selection bits (XT Oscillator)

#pragma config FSCM = ON        // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)

#pragma config IESO = ON        // Internal External Switchover bit (Internal External Switchover mode enabled)

​

// CONFIG2L

#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)

#pragma config BOR = ON         // Brown-out Reset Enable bit (Brown-out Reset enabled)

// BORV = No Setting

​

// CONFIG2H

#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))

#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

​

// CONFIG3H

#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled, RA5 input pin disabled)

​

// CONFIG4L

#pragma config STVR = ON        // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)

#pragma config LVP = OFF        // Low-Voltage ICSP Enable bit (Low-Voltage ICSP disabled)

​

// CONFIG5L

#pragma config CP0 = OFF        // Code Protection bit (Block 0 (00200-0007FFh) not code-protected)

#pragma config CP1 = OFF        // Code Protection bit (Block 1 (000800-000FFFh) not code-protected)

​

// CONFIG5H

#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code-protected)

#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

​

// CONFIG6L

#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (00200-0007FFh) not write-protected)

#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (000800-000FFFh) not write-protected)

​

// CONFIG6H

#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)

#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write-protected)

#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

​

// CONFIG7L

#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (00200-0007FFh) not protected from table reads executed in other blocks)

#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (000800-000FFFh) not protected from table reads executed in other blocks)

​

// CONFIG7H

#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from table reads executed in other blocks)

​

Click here to download zip file of this programming example.