ATMega644P SPI and SN74HC165 Shift Registers Example

Overview

The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (QH) output. Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs. 

 

 

This input expansion chip can be used in Programmable Logic Controllers, Appliances, Video Display Systems, Keyboards etc. This old digital IC is very easy to use with a typical 8-bit MCU since it has a small footprint and its Dual In-Line Package version. It is widely available at very low cost.

A DIP-16 Sample

 It has DIP-16 footprint and various SMD packages.

 

Pin Configuration and Functions

 It made from some digital logic gates and flip-flops.

Logic Diagram Positive Logic

 To load parallel input data (H:A) take a look at the timing diagram below.

Load Shift Sequence

Typically the SI (Serial Data In) is ignored or wires it GND. The Clock Inhabit (CLK INH) must wired to GND. At the transition from logic low to logic high of SH/LD pin allows parallel data loading and serial data shifting out via Serial Data Out (SO) pin.

In this example the ATMega644P read parallel input data of an SN74HC165N and display it on PORTD.

Source Code "main.c":

1. /*
2. * 12-spi_sn74hc165.c
3. *
4. * Created: 2/16/2026 11:12:37 AM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. 
    
21. void SPI_MasterInit(void)
22. {
23. /* Set MOSI and SCK output, all others input */
24. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
25. /* Enable SPI, Master, set clock rate fck/16 */
26. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
27. }
28. 
    
29. void SPI_MasterTransmit(char cData)
30. {
31. /* Start transmission */
32. SPDR = cData;
33. /* Wait for transmission complete */
34. while(!(SPSR & (1<<SPIF)))
35. ;
36. }
37. 
    
38. void SPI_SlaveInit(void)
39. {
40. /* Set MISO output, all others input */
41. DDR_SPI = (1<<DD_MISO);
42. /* Enable SPI */
43. SPCR = (1<<SPE);
44. }
45. char SPI_SlaveReceive(void)
46. {
47. /* Wait for reception complete */
48. while(!(SPSR & (1<<SPIF)))
49. ;
50. /* Return Data Register */
51. return SPDR;
52. }
53. 
    
54. 
    
55. int main(void)
56. {
57. /* Replace with your application code */
58. SPI_MasterInit();
59. //PRT_SPI|=(1<<DD_SS);
60. DDRD=0xFF;
61. _delay_ms(1000);
63. while (1)
64. {
65. PRT_SPI&=~(1<<DD_SS);
66. PRT_SPI|=(1<<DD_SS);
67. SPI_MasterTransmit(0x00);
68. PORTD=SPI_SlaveReceive();
69. _delay_ms(100);
70. }
71. }
72. 
    
73. 
    
74. 
    

I don't have this chip because local stores don't stock this part. So I can test it only in simulator. 

 

SPI Transfer and Receive One Byte Of Data Waveform

We can connect multiple SN74HC165N chips using a daisy-chain configuration. Here I scan two input ports of two SN74HC165N. So the master MCU needs to shift 16 clock cycles (two bytes of data).

Using Two SN74HC165N chips (Daisy-Chain)

SPI Waveform

Source Code "main.c":

1. /*
2. * sn74hc165_2.c
3. *
4. * Created: 2/16/2026 12:49:13 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. 
    
15. #define DD_SS 4
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. 
    
20. 
    
21. void SPI_MasterInit(void)
22. {
23. /* Set MOSI and SCK output, all others input */
24. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
25. /* Enable SPI, Master, set clock rate fck/16 */
26. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
27. }
28. 
    
29. void SPI_MasterTransmit(char cData)
30. {
31. /* Start transmission */
32. SPDR = cData;
33. /* Wait for transmission complete */
34. while(!(SPSR & (1<<SPIF)))
35. ;
36. }
37. 
    
38. void SPI_SlaveInit(void)
39. {
40. /* Set MISO output, all others input */
41. DDR_SPI = (1<<DD_MISO);
42. /* Enable SPI */
43. SPCR = (1<<SPE);
44. }
45. char SPI_SlaveReceive(void)
46. {
47. /* Wait for reception complete */
48. while(!(SPSR & (1<<SPIF)))
49. ;
50. /* Return Data Register */
51. return SPDR;
52. }
53. 
    
54. 
    
55. int main(void)
56. {
57. /* Replace with your application code */
58. SPI_MasterInit();
59. //PRT_SPI|=(1<<DD_SS);
60. DDRD=0xFF;
61. DDRC=0xFF;
62. while (1)
63. {
64. PRT_SPI&=~(1<<DD_SS);
65. PRT_SPI|=(1<<DD_SS);
66. SPI_MasterTransmit(0x00);
67. PORTD=SPI_SlaveReceive();
68. SPI_MasterTransmit(0x00);
69. PORTC=SPI_SlaveReceive();
71. _delay_ms(100);
73. }
74. }
75. 
    
76. 
    
77. 
    

For PIC Micro-controller users check this post:

• PIC16F887 SPI and MCP23S17 XC8 Example 

For ATMega32 AVR micro-controller user check this post:

• ATMega32 SPI interfaces to 74HC165 and 74HC595 shift registers 

 

 

ATMega644P SPI and MCP23S17 GPIO Expansion Example

Overview 

The MCP23S17 is an SPI 16-bit (two ports) bi-directional GPIO expansion chip. Its TWI version is the MCP23017. It's rich of functions, data direction, control, distinct input and output registers, programmable weak pull up resistors, interrupt capabilities etc. Its configuration setting is very similar to most of PIC micro-controller since it is produced by Microchip Technology.

MCP23S17 I/O Ports Programming

 

It contains two 8-bit bi-directional port, GPA and GPB. Both of them are programmable with additional interrupt features. Its two interrupt flag pins correspond to each ports. 

MCP23S17-E/SP

 The SPI version of this chip is very similar to the I2C version.

Package Types

Its SPI interface is bi-directional since it's a general purpose I/O chip. Its four SPI pins are Chip Select(CS), Serial Clock(SCK), Serial In(SI) and Serial Out(SO). Its three optional address pins are A2:A0. We can connect them to GND to set the SPI slave write address to 0x40 and 0x41 for read address.

Functional Block Diagram

 The programmer must configure the following registers to get a proper operation.

Register Addressed

 By default we don't set the IOCON register the default bank is BANK0 ranges from 0x00 to 0x15. For example the IODIRB locates at 0x01 and its output register OLATB locates at 0x15.

SPI ADDRESSING REGISTERS

The idle state of CS pin is high. To complete a write or read operation the master MCU has to send at least 3 write operations.

ATMega644 and MCP23S17 SPI Programming

The write operations contain three data bytes, slave write address, register address and data. For example to make GPA as output we must do the following step:

1. Set CS pin low
2. Send its slave address 0x40 (A2:A0=0)
3. Send IODIRA address 0x00
4. Send data direction 0x00 that is output direction
5. Clear CS pin 

Here the output ports GPA and GPB are output. They blink LED(s) every half second.

GPA and GPB are output ports

SPI Waveform

 C source Code "main.c":

1. /*
2. * 12-spi_mcp23s17.c
3. *
4. * Created: 2/15/2026 9:55:53 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. const char MCP23017_W=0x40;
13. const char MCP23017_R=0x41;
14. 
    
15. //IOCON.BANK=0
16. enum BANK0{
17. IODIRA=0,IODIRB,IPOLA,IPOLB,GPINTENA,GPINTENB,DEFVALA,
18. DEFVALB,INTCONA,INTCONB,IOCON1,IOCON2,GPPUA,GPPUB,
19. INTFA,INTFB,INTCAPA,INTCAPB,GPIOA,GPIOB,OLATA,OLATB
20. };
21. 
    
22. #define DDR_SPI DDRB
23. #define PRT_SPI PORTB
24. #define DD_MOSI 5
25. #define DD_MISO 6
26. #define DD_SCK 7
27. #define DD_SS 4
28. 
    
29. void SPI_MasterInit(void)
30. {
31. /* Set MOSI and SCK output, all others input */
32. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
33. /* Enable SPI, Master, set clock rate fck/16 */
34. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
35. }
36. 
    
37. void SPI_MasterTransmit(char cData)
38. {
39. /* Start transmission */
40. SPDR = cData;
41. /* Wait for transmission complete */
42. while(!(SPSR & (1<<SPIF)))
43. ;
44. }
45. 
    
46. void SPI_SlaveInit(void)
47. {
48. /* Set MISO output, all others input */
49. DDR_SPI = (1<<DD_MISO);
50. /* Enable SPI */
51. SPCR = (1<<SPE);
52. }
53. char SPI_SlaveReceive(void)
54. {
55. /* Wait for reception complete */
56. while(!(SPSR & (1<<SPIF)))
57. ;
58. /* Return Data Register */
59. return SPDR;
60. }
61. 
    
62. void mcp23s17_transmit(char address, char data){
63. PRT_SPI&=~(1<<DD_SS);
64. SPI_MasterTransmit(MCP23017_W);
65. SPI_MasterTransmit(address);
66. SPI_MasterTransmit(data);
67. PRT_SPI|=(1<<DD_SS);
68. }
69. 
    
70. 
    
71. int main(void)
72. {
73. /* Replace with your application code */
74. SPI_MasterInit();
75. PRT_SPI|=(1<<DD_SS); //Set CS Pin High
76. // GPA Output
77. mcp23s17_transmit(IODIRA,0x00);
78. //GPB Output
79. mcp23s17_transmit(IODIRB,0x00);
80. while (1)
81. {
82. mcp23s17_transmit(OLATA,0x0F);
83. mcp23s17_transmit(OLATB,0x00);
84. _delay_ms(500);
85. mcp23s17_transmit(OLATA,0xF0);
86. mcp23s17_transmit(OLATB,0xFF);
87. _delay_ms(500);
88. }
89. }
90. 
    

At this point the master MCU set a port as input.

This is an example of making GPB as input:

1. Set CS pin low
2. Send its slave address 0x40 (A2:A0=0)
3. Send IODIRB address 0x01
4. Send data direction 0xFF that is input direction
5. Clear CS pin 

And then we enable the weak pull up resistors of GPB:

1. Set CS pin low
2. Send its slave address 0x40 (A2:A0=0)
3. Send GPPUB address 0x0D
4. Send 0xFF to turn on all its pull up resistors
5. Clear CS pin 

The read operation also contains three data bytes, slave read address, register address, any data and read operation. For instance GPB is already an input port. So the MCU needs to read its input data:

1. Set CS pin low
2. Send its slave address 0x41 (A2:A0=0)
3. Send GPIOB address 0x13
4. Send one byte of data (eg:0x00) for shift data out from MCP23S17 SO pin
5. Perform the SPI read operation 
6. Clear CS pin 

This example GPB of MCP23S17 is an input port with weak pull resistors enabled. The master MCU read data from this port and send it back to GPA output port.

GPB as Input and GPA as Output

Waveform on virtual DSO

C Source Code "main.c":

1. /*
2. * 12-spi_mcp23s17_io.c
3. *
4. * Created: 2/15/2026 10:56:48 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. const char MCP23017_W=0x40;
13. const char MCP23017_R=0x41;
14. 
    
15. //IOCON.BANK=0
16. enum BANK0{
17. IODIRA=0,IODIRB,IPOLA,IPOLB,GPINTENA,GPINTENB,DEFVALA,
18. DEFVALB,INTCONA,INTCONB,IOCON1,IOCON2,GPPUA,GPPUB,
19. INTFA,INTFB,INTCAPA,INTCAPB,GPIOA,GPIOB,OLATA,OLATB
20. };
21. 
    
22. #define DDR_SPI DDRB
23. #define PRT_SPI PORTB
24. #define DD_MOSI 5
25. #define DD_MISO 6
26. #define DD_SCK 7
27. #define DD_SS 4
28. 
    
29. void SPI_MasterInit(void)
30. {
31. /* Set MOSI and SCK output, all others input */
32. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
33. /* Enable SPI, Master, set clock rate fck/16 */
34. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
35. }
36. 
    
37. void SPI_MasterTransmit(char cData)
38. {
39. /* Start transmission */
40. SPDR = cData;
41. /* Wait for transmission complete */
42. while(!(SPSR & (1<<SPIF)))
43. ;
44. }
45. 
    
46. void SPI_SlaveInit(void)
47. {
48. /* Set MISO output, all others input */
49. DDR_SPI = (1<<DD_MISO);
50. /* Enable SPI */
51. SPCR = (1<<SPE);
52. }
53. char SPI_SlaveReceive(void)
54. {
55. /* Wait for reception complete */
56. while(!(SPSR & (1<<SPIF)))
57. ;
58. /* Return Data Register */
59. return SPDR;
60. }
61. 
    
62. void mcp23s17_transmit(char address, char data){
63. PRT_SPI&=~(1<<DD_SS);
64. SPI_MasterTransmit(MCP23017_W);
65. SPI_MasterTransmit(address);
66. SPI_MasterTransmit(data);
67. PRT_SPI|=(1<<DD_SS);
68. }
69. 
    
70. char mcp23s17_receive(char address){
71. PRT_SPI&=~(1<<DD_SS);
72. SPI_MasterTransmit(MCP23017_R);
73. SPI_MasterTransmit(address);
74. SPI_MasterTransmit(0x00);
75. char data=SPI_SlaveReceive();
76. PRT_SPI|=(1<<DD_SS);
77. return data;
78. }
79. 
    
80. int main(void)
81. {
82. /* Replace with your application code */
83. SPI_MasterInit();
84. PRT_SPI|=(1<<DD_SS); //Set CS Pin High
85. mcp23s17_transmit(IODIRA,0x00);
86. mcp23s17_transmit(IODIRB,0xFF);
87. mcp23s17_transmit(GPPUB,0xFF);
88. while (1)
89. {
90. char data=mcp23s17_receive(GPIOB);
91. mcp23s17_transmit(OLATA,data);
92. _delay_ms(500);
93. }
94. }
95. 
    
96. 
    
97. 
    

For PIC micro-controller user this post shows how a PIC16F887 interfaces with the MCP23S17 using its dedicated SPI hardware.

 

 

 

 

 

ATMega644P Serial Peripheral Interface (SPI) Tutorial

Overview

The Serial Peripheral Interface (SPI) is a high speed serial communication that commonly use three wires, serial clock, serial data and enable (master transmit only). Most of modern micro-controller has this serial communication interface. It is useful for board to board or to device communication due to wiring complexity compare to parallel port data transmission.

SN74HC595N LED Driving

SPI is popular among graphical display, Flash memory, I/O expansion chip, SRAM, EEPROM, real time clock chip etc. Its transmission and reception speed could reach up to several Mbits/s. These are some example of SPI devices:

• DS3234 Real Time Clock
• Nokia 5510 graphical LCD module
• MCP23S17 I/O Expansion Chip
• SN74HC595N Serial In Parallel Out Shift Registers
• ILI9341/ST7785 240x320 TFT Display
• ST7735 128x160 TFT Display
• W25Q64JVSSIQ Flash Memory Chip
• SD MMC Card etc. 

W25Q64JVSSIQ

 

ILI9341/ST7785 240x320 TFT Display

 

Some earlier MCU doesn't have an SPI module inside for instance the AT89S52 or PIC16F84A. However the programmer could emulate a software SPI by using the bit-banging technique. This method is popular but it yield a lower speed data transmission and reception. 

Typically a system operation contains a master MCU that transmit and receive data from its connected SPI slave devices.

Single master to single slave: basic SPI wiring

 

The pin names of the SPI module in the AVR micro-controller are different from other MCU such as PIC. These pins are:

Abbr.	Name	Description
SS	Slave Select	Active-low chip select signal from master to enable communication with a specific slave device
SCLK	Serial Clock	Clock signal from master
MOSI	Master Out Slave In	Serial data output from master
MISO	Master In Slave Out	Serial data output from slave

The master MCU must select any connected SPI slave device via its slave select (SS) pin. One slave device has a unique SS pin. So multiple slave devices have many SS pins.

A typical hardware setup using two shift registers to form an inter-chip circular buffer

The SS pin is active low or active high upon the specific device.

Its clock polarity is commonly positive (low to high). Somes device use a negative (high to low) clock polarity.

 

However its clock polarity and phase are configured by user software that requires an understanding of technical detail of an MCU (Dedicated SPI Module).

The master MCU can communicates with many different SPI slave devices (Multidrop SPI bus) on a single bus using additional SS pins.

Multidrop SPI bus

 

If multiple SPI slave devices with the same type connect to a single SPI bus we can use the Daisy chain configuration. For instance the SN74HC595N or SN74HC164 serial in parallel out shift registers.

Daisy chain configuration

 It is used for expanding a number of output ports for instance driving a dot matrix display.

 Currently there are a lot of newer method of SPI data transmission that is precise and high speed.

ATMega644P Serial Peripheral Interface

The SPI module of the ATMega644P has the following features:

•     Full-duplex, Three-wire Synchronous Data Transfer
•     Master or Slave Operation
•     LSB First or MSB First Data Transfer
•     Seven Programmable Bit Rates
•     End of Transmission Interrupt Flag
•     Write Collision Flag Protection
•     Wake-up from Idle Mode
•     Double Speed (CK/2) Master SPI Mode

Its operation mode and speed are configured in user program via its relevant special function registers.

SPI Block Diagram

 Its clock generator is divided form the MCU clock up to CK/2. Data is shifted in and out using its internal 8-bit shift register at each clock cycle of the SPI clock generator. It also generate interrupt flag whenever the shift registers is empty.

SPI Master-slave Interconnection

 These are its relevant registers:

•   SPCR – SPI Control Register

SPCR – SPI Control Register

•  SPSR – SPI Status Register 

SPSR – SPI Status Register

• SPDR – SPI Data Register 

SPDR – SPI Data Register

The ATMega644P may operate in master transmit only, slave receive only or even full duplex (synchronous data transfer) depending on these registers.  For more detail please see the device datasheet. 

ATMega644P SPI Interfacing and Programming

We can configure the SPI module of the ATMega644P to operates in a specific mode depends on the worked application.

SPI Master Transmit Mode 

An SPI master transmits only is common. There are many SPI slave device that only need data reception such as the SN74HC595N or 74HC164 shift register chips. 

SN74HC595N and SN74HC164N Shift Registers

These chips is very popular due to its availability, low cost, ease of control etc. The SN74HC595N is commonly found in output expanding application such as relays driving, LED driving especially the dot matrix display driver.

SN74HC595N Pin Diagram

In this example the ATMega644P operate in master mode to transmit data to the SN74HC595N shifter register chip. The output port of this chip can connects to LED, 7-Segment displays or even a character LCD.

There are sample code of using the SPI transmit in device data sheet in both Assembly and C program.

Sample Code

 

LED Driving

I have a DIY single chip SN74HC595N LED module that is very easy to make. However we can install them together on a single breadboard.

A completed Soldering Board

Copper Side

 For more information about this DIY PCB see this post.

 The program is very simple.

1. /*
2. * 12-spi_74hc595_led.c
3. *
4. * Created: 2/14/2026 6:57:01 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. #define DD_MOSI 5
15. #define DD_SCK 7
16. #define DD_SS 4
17. 
    
18. void SPI_MasterInit(void)
19. {
20. /* Set MOSI and SCK output, all others input */
21. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
22. /* Enable SPI, Master, set clock rate fck/16 */
23. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
24. }
25. 
    
26. void SPI_MasterTransmit(char cData)
27. {
28. /* Start transmission */
29. SPDR = cData;
30. /* Wait for transmission complete */
31. while(!(SPSR & (1<<SPIF)))
32. ;
33. }
34. 
    
35. int main(void)
36. {
37. /* Replace with your application code */
38. SPI_MasterInit();
39. char i=0;
40. while (1)
41. {
42. SPI_MasterTransmit(1<<i);
43. PRT_SPI&=~(1<<DD_SS);
44. _delay_us(100);
45. PRT_SPI=(1<<DD_SS);
46. _delay_us(100);
47. i++;
48. if(i>8) i=0;
49. _delay_ms(100);
50. }
51. }
52. 
    

Schematic:

SN74HC595N LED Driving

 AVR Experiment Board:

SN74HC595N LED Driving

 

SN74HC595N LED Driving

 

 

SN74HC595N LED Driving

 The program just shift each bits of the SN74HC595N output port.

 

Seven Segments Display Driving

I made a single common cathode 7-Segment display that is driven by an SN74HC595N chip. So it's easy for the MCU to connect to this display using a little wires. 

Fully Solder Board

 

Copper Side After I Soldered.

 Source Code:

1. /*
2. * 12-spi_74hc595_7.c
3. *
4. * Created: 2/14/2026 9:42:04 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. //Common Anode
13. const char ca_7[16]={0xC0, 0xF9, 0xA4, 0xB0,0x99, 0x92,
14. 0x82, 0xF8, 0x80, 0x90, 0x88, 0x83, 0xA7, 0xA1, 0x86, 0x8E};
15. //Common Cathode
16. const char cc_7[16]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,
17. 0x07,0x7F,0x6F,0x77,0x7C,0x39,0x5E,0x79,0x71};
18. 
    
19. #define DDR_SPI DDRB
20. #define PRT_SPI PORTB
21. #define DD_MOSI 5
22. #define DD_SCK 7
23. #define DD_SS 4
24. 
    
25. void SPI_MasterInit(void)
26. {
27. /* Set MOSI and SCK output, all others input */
28. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
29. /* Enable SPI, Master, set clock rate fck/16 */
30. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
31. }
32. 
    
33. void SPI_MasterTransmit(char cData)
34. {
35. /* Start transmission */
36. SPDR = cData;
37. /* Wait for transmission complete */
38. while(!(SPSR & (1<<SPIF)))
39. ;
40. }
41. 
    
42. int main(void)
43. {
44. /* Replace with your application code */
45. SPI_MasterInit();
46. char i=0;
47. while (1)
48. {
49. SPI_MasterTransmit(ca_7[i]);
50. PRT_SPI&=~(1<<DD_SS);
51. _delay_us(100);
52. PRT_SPI=(1<<DD_SS);
53. _delay_us(100);
54. i++;
55. if(i>15) i=0;
56. _delay_ms(500);
57. }
58. }
59. 
    

Schematic:

Seven Segments Display Driving

 

Master Transmits and Slave Receives

An MCU operates in master or slave depends on software configuration. In this example one ATMega644P operates in master transmit only mode while another one operates in slave receive only. 

Code examples show how to initialize the SPI as a Slave and how to perform a
simple reception.

 

For master MCU the Slave Select (SS or PB4) pin (output mode) goes low whenever it start sending data out. For slave MCU whenever this pin (input mode) goes low data starts shift into its shift register at each clock cycle of SPI data transmission. However this pin is select-able by user software during transmission.

Source Code "main.c" for master MCU:

1. /*
2. * 12-spi_master_slave.c
3. *
4. * Created: 2/14/2026 11:01:07 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. //Common Anode
13. const char ca_7[16]={0xC0, 0xF9, 0xA4, 0xB0,0x99, 0x92,
14. 0x82, 0xF8, 0x80, 0x90, 0x88, 0x83, 0xA7, 0xA1, 0x86, 0x8E};
15. //Common Cathode
16. const char cc_7[16]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,
17. 0x07,0x7F,0x6F,0x77,0x7C,0x39,0x5E,0x79,0x71};
18. 
    
19. #define DDR_SPI DDRB
20. #define PRT_SPI PORTB
21. #define DD_MOSI 5
22. #define DD_MISO 6
23. #define DD_SCK 7
24. #define DD_SS 4
25. 
    
26. void SPI_MasterInit(void)
27. {
28. /* Set MOSI and SCK output, all others input */
29. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
30. /* Enable SPI, Master, set clock rate fck/16 */
31. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
32. }
33. 
    
34. void SPI_MasterTransmit(char cData)
35. {
36. /* Start transmission */
37. SPDR = cData;
38. /* Wait for transmission complete */
39. while(!(SPSR & (1<<SPIF)))
40. ;
41. }
42. 
    
43. void SPI_SlaveInit(void)
44. {
45. /* Set MISO output, all others input */
46. DDR_SPI = (1<<DD_MISO);
47. /* Enable SPI */
48. SPCR = (1<<SPE);
49. }
50. char SPI_SlaveReceive(void)
51. {
52. /* Wait for reception complete */
53. while(!(SPSR & (1<<SPIF)))
54. ;
55. /* Return Data Register */
56. return SPDR;
57. }
58. 
    
59. int main(void)
60. {
61. /* Replace with your application code */
62. SPI_MasterInit();
63. char i=0;
64. while (1)
65. {
66. SPI_MasterTransmit(1<<i);
67. _delay_ms(500);
69. i++;
70. if(i>7) i=0;
71. _delay_ms(500);
72. }
73. }
74. 
    

Source Code "main.c" for slave MCU: 

1. /*
2. * 12-spi_slave.c
3. *
4. * Created: 2/14/2026 11:05:48 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. #define DD_MOSI 5
15. #define DD_MISO 6
16. #define DD_SCK 7
17. #define DD_SS 4
18. 
    
19. void SPI_MasterInit(void)
20. {
21. /* Set MOSI and SCK output, all others input */
22. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
23. /* Enable SPI, Master, set clock rate fck/16 */
24. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
25. }
26. 
    
27. void SPI_MasterTransmit(char cData)
28. {
29. /* Start transmission */
30. SPDR = cData;
31. /* Wait for transmission complete */
32. while(!(SPSR & (1<<SPIF)))
33. ;
34. }
35. 
    
36. void SPI_SlaveInit(void)
37. {
38. /* Set MISO output, all others input */
39. DDR_SPI &= ~(1<<DD_MISO);
40. /* Enable SPI */
41. SPCR = (1<<SPE);
42. }
43. char SPI_SlaveReceive(void)
44. {
45. /* Wait for reception complete */
46. while(!(SPSR & (1<<SPIF)))
47. ;
48. /* Return Data Register */
49. return SPDR;
50. }
51. 
    
52. int main(void)
53. {
54. /* Replace with your application code */
55. 
    
56. SPI_SlaveInit();
57. DDRC=0xFF;
58. char i=0;
59. while (1)
60. {
61. PORTC=SPI_SlaveReceive();
62. _delay_ms(500);
63. }
64. }
65. 
    
66. 
    

Schematic:

 

Schematic

I have only one ATMega644 chip so I just simulate it using a simulator.

Here the master MCU read the ADC input with a variable voltage, convert it into voltage data before sending to its slave MCU. Thee slave MCU keep listening to the master receiving the voltage data and it will present on two 7-Segment displays.

Schematic

The contains three data bytes, slave adress (0xC1), decimal voltage value and fraction point.

Source Code "main.c" for master MCU:

1. /*
2. * 12-spi_master_slave.c
3. *
4. * Created: 2/14/2026 11:01:07 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. //Common Anode
13. const char ca_7[16]={0xC0, 0xF9, 0xA4, 0xB0,0x99, 0x92,
14. 0x82, 0xF8, 0x80, 0x90, 0x88, 0x83, 0xA7, 0xA1, 0x86, 0x8E};
15. //Common Cathode
16. const char cc_7[16]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,
17. 0x07,0x7F,0x6F,0x77,0x7C,0x39,0x5E,0x79,0x71};
18. 
    
19. const char slave_address=0xC1;
20. 
    
21. #define DDR_SPI DDRB
22. #define PRT_SPI PORTB
23. #define DD_MOSI 5
24. #define DD_MISO 6
25. #define DD_SCK 7
26. #define DD_SS 4
27. 
    
28. void SPI_MasterInit(void)
29. {
30. /* Set MOSI and SCK output, all others input */
31. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
32. /* Enable SPI, Master, set clock rate fck/16 */
33. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
34. }
35. 
    
36. void SPI_MasterTransmit(char cData)
37. {
38. /* Start transmission */
39. SPDR = cData;
40. /* Wait for transmission complete */
41. while(!(SPSR & (1<<SPIF)))
42. ;
43. }
44. 
    
45. void SPI_SlaveInit(void)
46. {
47. /* Set MISO output, all others input */
48. DDR_SPI = (1<<DD_MISO);
49. /* Enable SPI */
50. SPCR = (1<<SPE);
51. }
52. char SPI_SlaveReceive(void)
53. {
54. /* Wait for reception complete */
55. while(!(SPSR & (1<<SPIF)))
56. ;
57. /* Return Data Register */
58. return SPDR;
59. }
60. 
    
61. int main(void)
62. {
63. /* Replace with your application code */
64. SPI_MasterInit();
65. //Turn on the ADC module
66. ADCSRA=(1<<ADEN);
67. //Select ADC0
68. ADMUX=0;
69. char i=0;
70. long temp=0;
72. while (1)
73. {
74. //Start the conversion
75. ADCSRA|=(1<<ADSC);
76. //Wait for the completion
77. while((ADCSRA&(1<<ADSC))==1);
78. //Read the result
79. temp=ADCL+(ADCH<<8);
80. temp=temp*50/1023;
82. //Send data bytes
83. PRT_SPI&=~(1<<DD_SS);
84. SPI_MasterTransmit(slave_address);
85. SPI_MasterTransmit(cc_7[temp/10]|0x80);
86. SPI_MasterTransmit(cc_7[temp%10]);
87. PRT_SPI|=(1<<DD_SS);
88. _delay_ms(1000);
89. }
90. }
91. 
    

Source Code "main.c" for slave MCU: 

1. /*
2. * 12-spi_slave.c
3. *
4. * Created: 2/14/2026 11:05:48 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. const char slave_address=0xC1;
13. 
    
14. #define DDR_SPI DDRB
15. #define PRT_SPI PORTB
16. #define DD_MOSI 5
17. #define DD_MISO 6
18. #define DD_SCK 7
19. #define DD_SS 4
20. 
    
21. void SPI_MasterInit(void)
22. {
23. /* Set MOSI and SCK output, all others input */
24. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
25. /* Enable SPI, Master, set clock rate fck/16 */
26. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
27. }
28. 
    
29. void SPI_MasterTransmit(char cData)
30. {
31. /* Start transmission */
32. SPDR = cData;
33. /* Wait for transmission complete */
34. while(!(SPSR & (1<<SPIF)))
35. ;
36. }
37. 
    
38. void SPI_SlaveInit(void)
39. {
40. /* Set MISO output, all others input */
41. DDR_SPI &= ~(1<<DD_MISO);
42. /* Enable SPI */
43. SPCR = (1<<SPE);
44. }
45. char SPI_SlaveReceive(void)
46. {
47. /* Wait for reception complete */
48. while(!(SPSR & (1<<SPIF)))
49. ;
50. /* Return Data Register */
51. return SPDR;
52. }
53. 
    
54. struct spi_data{
55. char address;
56. char voltage;
57. char fraction;
58. };
59. int main(void)
60. {
61. /* Replace with your application code */
62. 
    
63. SPI_SlaveInit();
64. DDRD=0xFF;
65. DDRA=0xFF;
66. DDRC=0xFF;
67. struct spi_data _data;
68. while (1)
69. {
71. _data.address=SPI_SlaveReceive();
72. _data.voltage=SPI_SlaveReceive();
73. _data.fraction=SPI_SlaveReceive();
75. if (_data.address!=slave_address)
76. {
77. _data.voltage=_data.fraction=0x71;
78. }
79. PORTA=_data.voltage;
80. PORTC=_data.fraction;
82. }
83. }
84. 
    
85. 
    

Full-Duplex Mode

The ATMega644P able to operate in full-duplex mode (three-wire synchronous data transfer). It means that during data transmission it also has data reception at the same time.

SPI Master-slave Interconnection

For master MCU data is shifted out via MOSI pin and shifted in via MISO pin during transmission. For slave MCU data is shifted in via MOSI pin and shifted out via MISO pin during reception. The Slave Select (SS) pin is ignore here because it's controlled by SPI hardware.

Schematic and Program Simulation

 

In this example a master ATMega644P send PORTD input data to its slave ATMega644P device. At slave side received data will show on PORTC and it send back PORTD input data to its master MCU. The master MCU show received data from slave device on PORTC.

Simulate Program Wave Form

 

Master MCU Source Code "main.c":

1. /*
2. * master.c
3. *
4. * Created: 2/15/2026 4:38:04 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. #define DD_MOSI 5
15. #define DD_MISO 6
16. #define DD_SCK 7
17. #define DD_SS 4
18. 
    
19. void SPI_MasterInit(void)
20. {
21. /* Set MOSI and SCK output, all others input */
22. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
23. /* Enable SPI, Master, set clock rate fck/16 */
24. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
25. }
26. 
    
27. void SPI_MasterTransmit(char cData)
28. {
29. /* Start transmission */
30. SPDR = cData;
31. /* Wait for transmission complete */
32. while(!(SPSR & (1<<SPIF)))
33. ;
34. }
35. 
    
36. void SPI_SlaveInit(void)
37. {
38. /* Set MISO output, all others input */
39. DDR_SPI = (1<<DD_MISO);
40. /* Enable SPI */
41. SPCR = (1<<SPE);
42. }
43. char SPI_SlaveReceive(void)
44. {
45. /* Wait for reception complete */
46. while(!(SPSR & (1<<SPIF)))
47. ;
48. /* Return Data Register */
49. return SPDR;
50. }
51. 
    
52. int main(void)
53. {
54. /* Replace with your application code */
55. SPI_MasterInit();
56. DDRD=0x00;
57. DDRC=0xFF;
58. PORTD=0xFF;
59. while (1)
60. {
61. //Send data bytes
62. //PRT_SPI&=~(1<<DD_SS);
63. SPI_MasterTransmit(PIND);
64. PORTC=SPI_SlaveReceive();
65. //PRT_SPI|=(1<<DD_SS);
66. _delay_ms(100);
67. }
68. }
69. 
    

Slave MCU Source Code "main.c": 

1. /*
2. * slave.c
3. *
4. * Created: 2/15/2026 4:39:00 PM
5. * Author : Admin
6. */
7. 
   
8. #include <avr/io.h>
9. #include <util/delay.h>
10. #define F_CPU 16000000UL
11. 
    
12. #define DDR_SPI DDRB
13. #define PRT_SPI PORTB
14. #define DD_MOSI 5
15. #define DD_MISO 6
16. #define DD_SCK 7
17. #define DD_SS 4
18. 
    
19. void SPI_MasterInit(void)
20. {
21. /* Set MOSI and SCK output, all others input */
22. DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS);
23. /* Enable SPI, Master, set clock rate fck/16 */
24. SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
25. }
26. 
    
27. void SPI_MasterTransmit(char cData)
28. {
29. /* Start transmission */
30. SPDR = cData;
31. /* Wait for transmission complete */
32. while(!(SPSR & (1<<SPIF)))
33. ;
34. }
35. 
    
36. void SPI_SlaveInit(void)
37. {
38. /* Set MISO output, all others input */
39. DDR_SPI = (1<<DD_MISO);
40. /* Enable SPI */
41. SPCR = (1<<SPE);
42. }
43. char SPI_SlaveReceive(void)
44. {
45. /* Wait for reception complete */
46. while(!(SPSR & (1<<SPIF)))
47. ;
48. /* Return Data Register */
49. return SPDR;
50. }
51. 
    
52. int main(void)
53. {
54. /* Replace with your application code */
55. SPI_SlaveInit();
56. DDRD=0x00;
57. DDRC=0xFF;
58. PIND=0xFF;
59. while (1)
60. {
61. PORTC=SPI_SlaveReceive();
62. SPI_MasterTransmit(PIND);
63. _delay_ms(10);
64. }
65. }
66. 
    

At this time I only one AVR device so I can not test it in physical hardware.